8.2 Batteryless Sub-nW Cortex-M0+ processor with dynamic leakage-suppression logic

Recent low-voltage design techniques have enabled dramatic improvements in miniaturization and lifetime of wireless sensor nodes [1-3]. These systems typically use a secondary battery to provide energy when the sensor is awake and operating; the battery is then recharged from a harvesting source when the sensor is asleep. In these systems, the key requirement is to minimize energy per operation of the sensor. This extends the number of operations on one battery charge and/or reduces the time to recharge the battery between awake cycles. This requirement has driven significant advances in energy efficiency [1-2] and standby power consumption [3]. Batteries suffer from limited endurance (e.g., 5k discharge cycles [4] limiting lifetime to 3.5 months with a 30 min wakeup period) and scalability challenges in the sub-5 mm range due to sealing requirements [5]. This paper therefore focuses on a battery-less sensor system that operates directly from the energy harvesting source. In these systems, power is consumed as it is obtained, and hence the key requirement is to limit the maximum power draw, thereby reducing the size of the required harvesting source. While significant advances have been made in low power systems [6], the minimum power draw per logic gate remains in the 1-30pW range, resulting in 10s of nW consumed by a microcontroller. This in turn requires a relatively large harvesting source, limiting the ability to scale a sensor system to true miniature sizes (e.g., an 4mm 2 solar cell @240 lux is needed to produce 30nW [7]). Note that reducing supply voltage further in these systems is ineffective since they become leakage power dominated. Robustness concerns also often limit voltage scalability. This paper proposes a new logic implementation, referred to as dynamic leakage-suppression logic (DLSL) that consumes 10fW active power per gate, making two orders of magnitude improvement over recently published work. Power is reduced through a super-cutoff feedback mechanism, and minimum power is achieved at 350 – 550mV supply voltage. This supply voltage range eliminates the need for ultra-low voltage operation, which increases robustness. It also allows the circuits to be directly connected to various harvesting sources without DC-DC conversion. DLS logic is used to implement a Cortex M0+ processor that consumes 295pW, which is the lowest reported to date for a microcontroller. We show full functionality across –5 to 65°C and demonstrate autonomous operation when powered by a 0.09mm 2 solar cell in room lighting (240lux). Fig. …